The present invention relates to a semiconductor memory device; and, more particularly, to the semiconductor memory device with a temperature sensing device.
A semiconductor memory device is generally provided with plural cells for storing data, wherein each cell includes a transistor for switching to transmit charges and a capacitor for storing the charges, i.e., data. The term ‘data storage’ in the unit cell means the condition in which electric charges are accumulated in the capacitor. Accordingly, it is possible to store data in the unit cell without any electric power consumption in principle.
Undesirably, a leakage current is generated from a PN junction of MOS transistors and capacitors. As time progresses, the amount of initial charge stored is reduced and the data can disappear. Accordingly, in order to prevent a data loss, after operation to read the data stored in the cell, recharging the cell with the initial charge according to read data is required.
Data stored in the unit cells of memory are preserved by repeating the recharging operation periodically. The recharging operation is generally called a refresh operation. The refresh operation is controlled by a DRAM controller. DRAIvI consumes electric power periodically for the refresh operation. How to decrease the electric power consumption in a battery operated system such as a mobile device including a notebook, a PDA (Personal Digital Assistants) or a cellular phone, is a critical issue because lower electric power consumption is required.
A device for sensing the temperature precisely in the DRAM and outputting sensed information is required. As one of the methods for decreasing the electric power consumption during the refresh operation, changing a period of the refresh operation according to temperature is generally performed. With a temperature decrease, the data can be preserved longer in the DRAM without the refresh operation. First, a plurality of temperature ranges are determined. Then, a low frequency refresh clock for controlling the refresh operation is set up in a low temperature range. The refresh clock represents a signal enabled in the refresh operation. Consequently, the electric power consumption is reduced, since the refresh operation is performed less frequently at lower temperature.
As the integration rate or operation speed of a semiconductor memory device increases, the semiconductor memory device generates greater heat. The heat increases the internal temperature of the semiconductor memory device and affects normal operation. Consequently, the device for sensing the temperature within the DRAM precisely and outputting sensed information, i.e., a thermosensor, is required.
FIG. 1 is a block diagram of a conventional thermosensor in a semiconductor memory device. The thermosensor includes a temperature sensing unit 10, a multipurpose register (MPR) unit 20 and an output driver 30. The temperature sensing unit 10 senses temperatures in response to a driving signal ODTS_EN. The MPR unit 20, storing output signals TM_VAL[0:N] of the temperature sensing unit 10, outputs stored values MPR[0:N] in response to an output activation signal RD_ODTS. The output driver 30 outputs temperature signals ODTS_DT[0:N].
FIG. 2 is a schematic circuit diagram of the MPR unit 20 described in FIG. 1. The MPR unit 20 includes a plurality of latch units for storing the output signals TM_VAL[0:N] into bit-unit. The plurality of latch units have substantially same structures. One latch unit is described.
A first latch unit includes a latch 22 and a transmission gate TG1. The latch 22 latches the output signals TM_VAL[0:N]. The transmission gate TG1 transmits output data of the latch 22 in response to the output activation signal RD_ODTS.
FIG. 3 is a timing diagram for describing an operation of the thermosensor shown in Fig. 1. Values of a signal TEMP, i.e., T−1, T, T+1, and T+2, represent present temperatures inside the semiconductor memory device.
The temperature sensing unit 10 senses the present temperature valued at T degrees in response to the [N]th driving signal ODTS EN[N]. The MPR unit 20 stores the output signal of the temperature sensing unit 10 as a [N]th temperature value [N]th ODTS Data. Before the output signal is input from the temperature sensing unit 10, the MPR unit 20 has stored the previous output signal as a [N-1]th temperature value [N-1]th ODTS Data.
At a predetermined time after an input timing of the [N]th driving signal, the output activation signal RD_ODTS is input. The MPR unit 20 outputs the stored value MPR[N] in response to the output activation signal RD ODTS. The output driver 30 outputs the temperature signal ODTS_DT[N] in FIG. 1, representing T degrees.
While the thermosensor outputs the present temperature valued at T degrees, the temperature of the semiconductor memory device has changed from T degrees to (T+2) degrees. The thermosensor cannot actually represent the present temperature of the semiconductor memory device.
According to a specification of Joint Electron Device Engineering Council (JEDEC), the refresh operation is required to perform in a period of 64 ms when the temperature of the device is less than 85° C. degrees. The refresh operation is required to perform in a period of 32 ms when the temperature of the device is more than the 85° C. degrees.
When the MPR unit 20 stores the [N]th temperature value as 83° C. degrees and the present temperature increases over 85° C. degrees, the thermosensor outputs the temperature signal ODTS_DT[N], representing 83° C. degrees. The refresh operation is performed in a period of 64 ms. However, the present temperature is over 85° C. degrees actually and the refresh operation is required to be performed in a period of 32 ms. Due to an inappropriate refresh operation, the data can be lost.
The thermosensor maintains the temperature values stored in MPR unit before subsequent driving signals are input. The conventional thermosensor cannot represent the temperature changes of the semiconductor memory device precisely.